reg [7:0] test_reg = 8’b1111_0000 ;
这条正确, 尽量不用reset可以减少control set 的逻辑.
initial is for simulation only , it will get ignored during synthesis and will not initialize. quartus 2 has an option in the Assignment editor called Power Up Level. you set it’s value either 0 or 1. by default quartus initializes all registers to 0. link your register to that assignment, and set the value for it, to initialize a flip flop or a register to 1 when the system starts up.
This is untrue. Quartus now take initialisation values in code (aswell as async reset values) as the power up value. It has been doing this for several years!
what is control set
Control Signals and Control Sets
A control set is the grouping of control signals (set/reset, clock enable and clock) that drives any given SRL, LUTRAM, or register. For any unique combination of control signals, a unique control set is formed. The reason this is an important concept is registers within a 7 series slice all share common control signals and thus only registers with a common control set may be packed into the same slice.
Designs with several unique control sets may have a lot of wasted resources, as well as fewer options for placement resulting in higher power and lower performance. Designs with fewer control sets have more options and flexibility in terms of placement, generally resulting in improved results. In UltraScale™ devices, there is more flexibility in control set mapping within a CLB. However, it remains a good practice to limit unique control sets to give maximum flexibility in placement of a group of logic.
When and Where to Use a Reset
FPGA devices have dedicated global set/reset signals (GSR). These signals initialize all registers to the initial value specified state in the HDL code at the end of device configuration.
If an initial state is not specified, it defaults to a logic zero. Accordingly, every register is at a known state at the end of configuration, regardless of the reset topology specified in the HDL code. It is not necessary to code a global reset for the sole purpose of initializing the device on power-up.